This invention relates to a semiconductor test system for testing semiconductor devices such as integrated circuits (ICs), and more particularly, to calibrating individual tester pins in a semiconductor test system without the need for external test equipment.
In testing semiconductor devices such as ICs using a test system such as an IC tester, test systems such as automatic test equipment (ATE) provide the device under test (DUT) with test signals or test patterns at specific functional test pins. The test signals are transmitted to the DUT using drivers which may generate the test signals at a selectable amplitude, impedance, current, slew rate, and the like. The test system receives output signals from the DUT in response to the test signals, and the output signals are strobed or sampled by analog comparators upon receipt of strobe signals generated at predetermined time intervals. The captured output data is compared with expected output data to determine whether the DUT is functioning correctly.
FIG. 1 illustrates an exemplary test system environment 100. Test vectors from pin unit 102 on pincard 104 may need to pass through a driver 106, cabling 108, functional xe2x80x9cpogo pinsxe2x80x9d 110, traces 112 on loadboard 114, socket 116, and finally into DUT 118. Output signals must return to the pincard 104 through a similar path, except that the output signals would pass through one or more comparators 120 rather than a driver 106. The driver 106 and comparator 120 are typically assembled in blocks known as pin units or pin electronics 122.
As supplied from pincard vendors, each pincard 104 installed into the test system 100 is identical in design. However, the installed pincards 104 reside in different slots within the test system 100 and therefore have unique physical signal paths. Lengthy signal paths may contain parasitic resistances and capacitances (RCs) which can slow down the propagation of the signals and rise and fall times. Moreover, although the signal paths through each pin unit 102 on each pincard 104 utilize the same circuit designs and part types, part-to-part variations may also introduce differences in propagation delays, voltage and current levels, and rise and fall times. Because testing of the DUT can require precise control of the alternating current (AC) and direct current (DC) characteristics of input test signals and precise measurement of output signal timing and parametrics, test signals and output signals in the pin units 102 need to be calibrated to account for measurement error and signal degradation, thereby ensuring accurate measurements.
Calibration data can be thought of as compensation data used to adjust the measurement or stimulus of a device to provide the most accurate results. Calibration data can be used in several ways. For example, it can be a hardware correction register parameter or an adjustment parameter used to correct a measured result. Calibration data may be needed in a test system on a per-pin basis to compensate for reference driving voltages, reference comparison voltages, driving current loads, parametric measurement circuits connected to the test pins, timing strobes used to trigger comparisons, timing triggers used to drive test pin stimulus, and the like.
Traditionally, calibration of functional test pins has been performed using test equipment external to the test system such as oscilloscopes, voltmeters, current meters, and the like. These traditional methods can be very time consuming. The compensation data is obtained when each tester pin is measured for all DC and AC characteristics. For DC measurements, the test equipment needs to have Voltage Source, Current Measure (VSIM) and Current Source, Voltage Measure (ISVM) capabilities. This method provides DC measurements with an error factor associated with the error of the measuring equipment. For AC measurements (i.e., timing related characteristics such as edge placement, waveform rise time, and waveform fall time), a high-speed oscilloscope may be used. For these measurements as well, the error factor is the error of the measuring instrument. One limitation of external measuring instruments is that they are typically controlled by General Purpose Interface Bus (GPIB) protocols that have a slow response time. Because all measurements are taken by external test equipment via a GPIB, the large number of tester pins on current ATE systems results in a very time consuming process to obtain all measurement data and to compute compensation values whenever and wherever compensation is needed.
Therefore, a need exists for an ATE calibration method that does not require external test equipment to calibrate individual tester pins, and provides balanced timing skews among the pincards.
Embodiments of the present invention are directed to an ATE calibration method and system that does not require external test equipment to calibrate individual functional pins and provides balanced timing skews among the functional pins and pincards.
A test system environment generally applicable to embodiments of the present invention includes multiple pincards, each pincard coupled to a DUT interface such as a loadboard via cabling. The pincards are also connected to test system components common to the pincards such as a tester controller through a tester bus on a backplane. Each pincard may have multiple functional pins and one or more precision measurement units (PMUs). PMUs may be shared between two or more functional pins, or dedicated to a single functional pin. The PMUs on all pincards in a test system together comprise a universal DC unit (UDC) (a.k.a. central measurement unit or central DC reference unit). In embodiments of the present invention, the UDC can also function as a distributed measurement circuit capable of making DC measurements on tester pins themselves and thus can act as a substitute for external test equipment. The UDC is connected to functional pins for measuring a DUT when the test system is in a normal test (not calibration) mode.
Embodiments of the present invention assign at least one functional pin in the test system as a reference or xe2x80x9cgoldenxe2x80x9d pin specifically for calibration purposes. In addition, one PMU is assigned as the reference PMU. In one implementation, the reference PMU is located on the same pincard as the reference pin. Alternatively, it can be located on the backplane or on another pincard. Because reference pin is selected from among the functional test pins, the reference pin has the same characteristics as any other functional test pin. However, once a functional pin is designated as a reference pin, in preferred embodiments that pin is prohibited from being used as a functional pin. However, in alternative embodiments, the reference pin may be used as a functional pin.
Once the reference pin and reference PMU have been designated, external test equipment is used to measure the AC and DC characteristics of the reference pin. The reference PMU is also used to measure the AC and DC characteristics of the reference pin. Note that it is possible to measure and store data on the reference pin for two different operational modes. Because the test equipment reference pin measurements become the standard against which all functional pins and PMUs are measured, the tester controller compares the reference PMU reference pin measurements to the test equipment reference pin measurements. Any deviation represents an error in the reference PMU that is taken into account when measuring and calibrating functional pins using the reference PMU. Once the parameters and characteristics of the reference pin and reference PMU are determined, all other functional pins in the test system can be connected to and measured against the reference pin using the reference PMU, without the need for external test equipment.
Each functional pin and reference pin contains driver and comparator circuitry. To measure the output driver characteristics of a functional pin, switches are configured to couple the comparators of the reference pin to the driver of the functional pin. No DUT is connected at this time. The reference PMU then makes DC measurements of the functional pin driver. These DC measurements may then be offset by any known reference PMU errors. Similarly, to measure the input comparator characteristics (e.g. input voltage and current levels) of the functional pin, switches are configured to couple the driver of the reference pin to the comparators of the functional pin. The reference PMU then makes DC measurements of the functional pin comparators, again offset by any known reference PMU errors. The use of a reference pin and a calibrated reference PMU as a measurement tool eliminates the need to measure individual functional pin parameters using external test equipment, thereby reducing the overall calibration time. By comparing the measured reference pin data to the measured functional pin data, calibration data can be determined for each of the functional pins.
To ensure that skews are balanced among all pins to the greatest extent possible, in one embodiments of the present invention the location of the reference pin is selected to be as close as possible to the midpoint of the functional pin range. However, even though the reference pin may be assigned a midpoint location, the large difference in skews may nevertheless be difficult to compensate. Therefore, in another embodiment of the present invention, more than one reference pin could be designated to limit the variations in skews. Based on the stored calibration data for the functional pins, the tester controller can determine how many reference pins are needed, and where to assign them to limit the maximum skew in the test system.
Embodiments of the present invention employ nonvolatile memory such as flash memory in each pincard and optionally in the backplane to store the calibration data. This non-volatile memory resides locally on each pincard, and thus if a pincard is removed from the system or a power interruption occurs, the calibration data is not lost.